A factor in the rapid increase in the use of integrated circuits is the development of high density metal-oxide-semiconductor (MOS) integrated circuits, which allow complex logic or large dense memories to be built on a single silicon chip. The use of polycrystalline Silicon (poly Si) as a gate-electrode material is a key to the fabrication of dense MOS chips. Poly Si also finds use in bipolar circuits where, again, device characteristics and device density are improved by its use. Interconnections for integrated circuits are also made using low resistivity doped poly Si. In addition, research is underway to fabricate high mobility, poly Si, thin film transistors (TFT) for use in display technology.
For TFT applications, poly Si should have high carrier mobilities. For MOS gate-electrodes and for interconnections in integrated circuits, the poly Si used must have the highest possible conductivity. To enhance the conductivity achievable with a given doping, it is necessary to suppress grain boundary segregation, to enhance doping activation, and to enhance carrier mobility. Increasing grain size will reduce grain boundary segregation since, relatively speaking, it leads to less grain boundary regions. Increasing grain size will also enhance mobility, since, for the same reason, it leads to less grain boundary scattering. Annealing temperatures close to or in excess of 1000.degree. C. or, alternatively, long annealing times of the order of 100 hours, are used to achieve increased grain sizes in polycrystalline films. A standard procedure is to deposit the film at a temperature of 500.degree.-600.degree. C. in either amorphous or microcrystalline form and then to anneal the film in the 1000.degree. C. range, for times on the order of an hour. An alternative known approach is to anneal at temperatures greater than 550.degree. C.; however, this requires annealing times on the order of days.
An indication of processing techniques currently used to obtain polycrystalline thin films with acceptable grain sizes can be obtained by considering the work of Becker et al. and Hatalis et al. Becker et al. (J. Appl. Phys., Vol 56(4), p. 1233 (1984)) used low pressure chemical vapor deposition (LPCVD) to deposit amorphous Si (a-Si) and polycrystalline silicon (poly-Si) films in the temperature range of 560.degree.-630.degree. C., and then subsequently annealed those films at 950.degree. C. for 30 minutes. The grain sizes for such films, after annealing were in the 700-2000 Angstrom range. Hatalis et al. (J. App. Phys., Vol 63(7), p. 2260 (1988)) also used LPCVD a-Si deposited at 545.degree. C., but used an annealing temperature of 550.degree. C. In this case, it took 72 hours of annealing to obtain 0.5 micrometer size grains.
Another approach to obtaining large grain polycrystalline silicon films involves amorphization of small grain poly Si films using ion implantation and a subsequent thermal annealing to obtain large grains. Bhattacharyya et al. (J. Electrochem. Soc., Vol 131(9), p. 2143 (1984)) used amorphization by Ar ion implantation and subsequent 900.degree./30 min. annealing of LPCVD poly Si films deposited at 620.degree. C. In such an approach, the grain size after annealing was about 0.75 micrometer. Kwizera et al. (J. Appl. Phys. Lett, Vol 41(4), p. 379 (1982)) used LPCVD poly Si films deposited at 620.degree. C., which were then amorphized using Si ion implantation and annealed at the temperature of 525.degree. C. However, it took 144 hours to obtain 1 micro meter grains.
In general, amorphization prior to annealing results in larger grains compared to other previously described methods, but it faces the same problems seen in the other approaches: annealing temperatures of the order of 1000.degree. C. for about one hour or lower annealing temperatures for times on the order of 100 hours. Processing steps requiring temperatures of the order of 1000.degree. C. are becoming more undesirable in integrated circuit fabrication, and they are intolerable in applications such as display technologies, which may use inexpensive substrates such as glass. Processing steps requiring annealing times of the order of 100 hours are not practical for mass production.
A rapid thermal technique, differing substantially from the invention described here, that can produce large grain polycrystalline silicon is laser annealing. Morin et al. (J. Appl. Phys. Vol 53(5), p. 3897 (1982)) used a ruby laser to crystallize glow-discharge a Si films. The grain size obtained after the laser exposure was in the 1500-Angstrom range. However, the problems associated with laser annealing include throughput and uniformity.
In order to produce doped poly Si, films can be doped during deposition or by ion implantation or diffusion after deposition. To achieve the highest possible conductivity for a given doping, it is necessary to have a large grain size, as mentioned above. In the art, as now practiced, annealing temperatures on the order of 1000.degree. C. are generally used to increase the grain size of doped films. Wada et al. (J. Electrochem. So, Vol. 125(9), p. 1499 (1978)) used chemical vapor deposited (CVD) poly Si films deposited at 630.degree. C. and implanted with 7.5.times.10.sup.20 cm.sup.-3 phosphorus as a precursor material for a large grain doped poly Si. Annealing was performed at 1100.degree. C. for 20 minutes, and the grain size, after annealing, was approximately 2.5 micro meter. Murota et al. (J. Appl. Phys, Vol. 53(5), p. 3702 (1982)) used gas phase doped poly Si as a precursor material to obtain high conductivity films. The films were doped with phosphorus by introducing PH.sub.3 into the reaction chamber during film deposition at a substrate temperature of 730.degree. C. Films were then annealed at 1100.degree.- 1200.degree. C. for 30 minutes. Resulting films had the very low resistivity value of 5.times.10.sup.-4 uhm-centimeter. The grain size of the films was 0.3 micro meter.
More recently, it has been shown that the deposition of a precursor a-Si can be achieved at a temperature of approximately 250.degree. C., using plasma-enhanced chemical vapor deposition (PECVD). Additionally, the annealing process to produce poly Si has been reduced to minutes of exposure at temperatures less than 700.degree. C. The rapid thermal annealing (RTA) was achieved in one of two ways. One used tungsten-halogen bulbs and the other used quick furnance exposures. Both methods produced undoped and highly doped polycrystalline films of excellent quality. That work is summarized in Kakkad et al., "Crystalized Si Films by Low-Temperature Rapid Thermal Annealing of Amorphous Si", Journal of Applied Physics, Vol. 65, No. 5, Mar. 1, 1989, pages 2069-2072. Notwithstanding the developments, as reported by Kakkad et al., it remains important to reduce, as far as possible, the thermal annealing temperatures for poly Si. Additionally, it is important to be able to selectively crystallize a-Si into high quality poly Si patterns in a-Si. The use of laser annealing to achieve this result is too slow for production applications. A rapid process would have many applications, including the production of self isolated devices, i.e., patterned regions of poly Si surrounded by high resistivity a-Si. Such a process could allow a-Si to be formed into high quality poly Si driver circuits and, in predetermined regions, to remain as a-Si for sensor or TFT pixel switches. Such a process could also allow the same a-Si precursor to give rise to poly Si which could be exploited for its mobility or dopability, and to a-Si which could be exploited for its photoconductivity or very high resistivity.
Accordingly, it is an object of this invention to provide a method for annealing a-Si to poly Si at temperatures lower than heretofore reported.
It is another object in this invention to provide a simple and inexpensive method for achieving patterned poly Si by selective crystallization of a-Si.